博士前期課程2年の水野さんの論文が,応用物理学会 英文論文誌 JJAP(Japanese Journal of Applied Physics, Special issue: Solid-State Devices and Materials(SSDM 2023))に掲載決定いたしました.超低消費電力で動作するIoTデバイス向けの電源回路を提案したものです.回路アーキテクチャの提案のみならず,シミュレーションおよびLSIチップの試作評価を通じて,有効性を示しました.
Y. Mizuno, H. Sebe, D. Kanemoto, T. Hirose, “Ultra-low power low-dropout linear regulator with a load current tracking bias current generator for loT devices,” Jpn. J. Appl. Phys. 63 02SP96, 2024.
IEEE 42nd International Conference on Consumer Electronics (ICCE 2024) にて論文発表を行いました.ICCE 2024は2024年1月5日から8日にかけてLas Vegas, Nevada, USAで開催され,廣瀬研から津永さん(1月7日), 宮田さん(1月8日)が発表を行いました.宮田さんは口頭発表を行い,津永さんはポスター発表を行いました.
T. Miyata, D. Kanemoto, and T. Hirose,”Utilizing Previously Acquired BSBL Algorithm Parameters in the Compressed Sensing Framework for EEG Measurements,” in Proc. IEEE Int. Conf. Consum. Electron. (ICCE), Jan. 2024, pp.1-4.
R. Tsunaga, D. Kanemoto, and T. Hirose,”Noise-Masking Cryptosystem Using Watermark and Chain Generation for EEG Measurement with Compressed Sensing,” in Proc. IEEE Int. Conf. Consum. Electron. (ICCE), Jan. 2024, pp.1-5.
ICCE2024会場(Tuscany Suites and Casino).右から津永さん,宮田さん,兼本.津永さんポスター発表の様子.宮田さん口頭発表の様子.
社会人博士の三井さんの論文が, 応用物理学会 英文論文誌 JJAP(Japanese Journal of Applied Physics, Special issue: Solid State Devices and Materials (SSDM2023))に掲載決定いたしました.省電力でありながら,安定した出力が得られる電源集積回路技術を提案した論文です.低消費電力動作で特定の周波数における電源変動が抑えられる技術を提案し,その技術を活用したLSIチップの実装・評価を通し,有効性を示しました.
K. Mii, D. Kanemoto, T. Hirose, “Low Quiescent Current LDO with FVF-Based PSRR Enhanced Circuit for EEG Recording Wearable Devices,” Jpn. J. Appl. Phys. 63, 03SP33, 2024.
Kaori Matsumoto, Ryuki Ikeda, Hikaru Sebe, Nobutaka Kuroki, Masahiro Numa, Daisuke Kanemoto and Tetsuya Hirose, “Switched-Capacitor Voltage Boost Converter with Digital Maximum Power Point Tracking for Low-Voltage Energy Harvesting,” Extended abstract of the 2022 International Conference on Solid State Devices and Materials (SSDM 2022), K-9-07, pp. 800-801, Sep. 26-29, 2022.
Kaori Matsumoto, Ryuki Ikeda, Hikaru Sebe, Nobutaka Kuroki, Masahiro Numa, Daisuke Kanemoto and Tetsuya Hirose, “Fully-integrated switched-capacitor voltage boost converter with digital maximum power point tracking for low-voltage energy harvesting,” Japanese Journal of Applied Physics, Volume 62, Number SC1071, 2023. [doi]
H. Sebe, T. Okumura, S. Sumi, D. Kanemoto, P. -H. Chen, T. Hirose, “Sub-30-mV-Supply, Fully Integrated Ring Oscillator Consisting of Recursive Stacking Body-Bias Inverters for Extremely Low-Voltage Energy Harvesting,” Proceedings of the 49th European Solid-State Circuits Conference (ESSCIRC), pp. 325-328, Lisbon, Portugal, Sep. 11-14, 2023.
International conference on Solid State Devices and Materials (SSDM) 2023にて論文発表を行いました.SSDMは2023年9月5日から8日かけて開催され,9月7日に廣瀬研から三井さん,水野さん,鷲見さんが発表を行いました.三井さんは口頭発表とポスター発表を行い,水野さん,鷲見さんはポスター発表を行いました.
K. Mii, D. Kanemoto, and T. Hirose, “Low Quiescent Current LDO with FVF-Based PSRR Enhanced Circuit for EEG Recording Wearable Devices,” in Ext. Abstr. Solid State Devices and Materials (SSDM), J-3-04, Sep. 2023.
Y. Mizuno, H. Sebe, D. Kanemoto, and T. Hirose, “An Ultra-Low Power Low-Dropout Regulator with a Load Current Tracking Bias Current Generator,” in Ext. Abstr. Solid State Devices and Materials (SSDM), PS-12-03, Sep. 2023.
S. Sumi, H. Sebe, D. Kanemoto, and T. Hirose, “A sub-50-mV supply, recursive stacking body bias NAND gate for extremely low-voltage energy harvesting,” in Ext. Abstr. Solid State Devices and Materials (SSDM), PS-12-04, Sep. 2023.
K. Mii, D. Kanemoto, and T. Hirose, “Low Quiescent Current Capacitively-coupled Chopper Instrumentation Amplifier in EEG Recording Wearable Devices for Compressed Sensing Framework,” in Ext. Abstr. Solid State Devices and Materials (SSDM), PS-12-06, Sep. 2023.
国際会議 International Conference on Solid-State Devices and Materials (SSDM) 2023に,三井さん,水野さん,鷲見さんの論文が採択されました.
K. Mii, D. Kanemoto, and T. Hirose, “Low Quiescent Current Capacitively-coupled Chopper Instrumentation Amplifier in EEG Recording Wearable Devices for Compressed Sensing Framework,” in Ext. Abstr. Solid State Devices and Materials (SSDM), Sep. 2023.
K. Mii, D. Kanemoto, and T. Hirose, “Low Quiescent Current LDO with FVF-Based PSRR Enhanced Circuit for EEG Recording Wearable Devices,” in Ext. Abstr. Solid State Devices and Materials (SSDM), Sep. 2023.
Y. Mizuno, H. Sebe, D. Kanemoto, and T. Hirose, “An Ultra-Low Power Low-Dropout Regulator with a Load Current Tracking Bias Current Generator,” in Ext. Abstr. Solid State Devices and Materials (SSDM), Sep. 2023.
S. Sumi, H. Sebe, D. Kanemoto, and T. Hirose, “A sub-50-mV supply, recursive stacking body bias NAND gate for extremely low-voltage energy harvesting,” in Ext. Abstr. Solid State Devices and Materials (SSDM), Sep. 2023.
H. Sebe, T. Okumura, S. Sumi, D. Kanemoto, P. -H. Chen, T. Hirose, “Sub-30-mV-Supply, Fully Integrated Ring Oscillator Consisting of Recursive Stacking Body-Bias Inverters for Extremely Low-Voltage Energy Harvesting,” Proceedings of the 49th European Solid-State Circuits Conference (ESSCIRC), pp. 325-328, Lisbon, Portugal, Sep. 11-14, 2023.